The disclosure relates to a semiconductor device and a method of fabricating the same, and in particular, to a three-dimensional semiconductor memory device and a method of fabricating the same.
Higher integration of semiconductor devices is desired to satisfy consumer demands for performance and price. In the case of semiconductor memory devices, since integration is an important factor in determining product prices, increased integration is especially desirable. In the case of two-dimensional or planar semiconductor memory devices, since their integration is mainly determined by the area occupied by a unit memory cell, integration may be greatly influenced by the level of a fine pattern forming technology. However, the expensive process equipment needed to increase pattern fineness may set a practical limitation on increasing integration for two-dimensional or planar semiconductor memory devices.
To overcome such a limitation, three-dimensional memory devices (for example, including three-dimensionally arranged memory cells) have been proposed. In the case of the three-dimensional memory device, not only memory cells but also signal or interconnection lines (e.g., word lines or bit lines) for the access to the memory cells may be arranged three-dimensionally.